| Title: | OS6-1 Real-time pattern recognition implementation on FPGA in multi-SNNs |
|---|---|
| Publication: | ICAROB2020 |
| Volume: | 25 |
| Pages: | 151-154 |
| ISSN: | 2188-7829 |
| DOI: | 10.5954/ICAROB.2020.OS6-1 |
| Author(s): | Xia Yang, Timothée Levi, Takashi Kohno |
| Publication Date: | January 13, 2020 |
| Keywords: | SNN, STDP, DSSN, FPGA, Ethernet |
| Abstract: | By mimicking or being inspired by the nervous system, Neuromorphic systems are designed to realize robust and power-efficient information processing by highly parallel architecture. Spike timing dependent plasticity (STDP) is a common method for training Spiking Neural Networks (SNNs) for pattern recognition. Here, we present a real-time STDP implementation on FPGA in SNN using digital spiking silicon neuron (DSSN) model. Equipped with Ethernet Interface, FPGA allows online configuration as well as data input and output all in real-time. We show that this STDP implementation can achieve pattern recognition task and the connection between multi-SNNs enlarge the scale of networks and application. |
| PDF File: | https://alife-robotics.co.jp/members2020/icarob/data/html/data/OS/OS6/OS6-1.pdf |
| Copyright: | © The authors. This article is distributed under the terms of the Creative Commons Attribution License 4.0, which permits non-commercial use, distribution and reproduction in any medium, provided the original work is properly cited. See for details: https://creativecommons.org/licenses/by-nc/4.0/ |
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