Title:

OS9-5 A Multistage Heuristic Tuning Algorithm for an Analog Silicon Neuron Circuit

Publication: ICAROB2017
Volume: 22
Pages: 144-147
ISSN: 2188-7829
DOI: 10.5954/ICAROB.2017.OS9-5
Author(s): Ethan Green, Takashi Kohno
Publication Date: January 19, 2017
Keywords: neuromorphic engineering, analog VLSI, silicon neurons
Abstract: This research looks at an ultra-low power subthreshold-operated silicon neuron circuit designed with qualitative neuronal modeling. One technical challenge to future implementation of such circuits is parameter tuning—a problem stemming from temperature sensitivity of subthreshold-operated MOSFETs and the uniqueness of individual circuits in a neuronal network due to transistor variation. This research proposes a fully automated parameter tuning algorithm that combines two heuristic approaches to search for appropriate circuit parameters over a range of temperatures. The algorithm can tune the circuit to behave as a Class I or Class II neuron.
PDF File: https://alife-robotics.co.jp/members2017/icarob/data/html/data/OS_pdf/OS9/OS9-5.pdf
Copyright: © The authors.
This article is distributed under the terms of the Creative Commons Attribution License 4.0, which permits non-commercial use, distribution and reproduction in any medium, provided the original work is properly cited.
See for details: https://creativecommons.org/licenses/by-nc/4.0/

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